1. Field of the Invention
The present invention relates to a semiconductor device and a manufacturing method thereof, and more particularly to a high-density type semiconductor device (HDP: High Density Package) of a flip-chip method, a semiconductor device (especially, CSP: Chip Size (Scale) Package) including an HDP mounted on an interposer and a multi chip module (MCM: Multi Chip Module, stacked MCP: Multi Chip Package) including a plurality of HDPs, and a manufacturing method thereof.
2. Description of the Related Art
In recent years, research and development work has been conducted on a higher density of mounting in a semiconductor device, and a number of structures and methods have been proposed for package forms or mounting methods. The forms are transitioning from QFPs (Quad Flat Package) which are a typical conventional semiconductor package to BGA (Ball Grid Array) packages of an area array type in response to the needs of an increase in number of pins and a reduction in size and weight. A high-density semiconductor package called a CSP with a reduced package size substantially equal to a chip size has been employed often in electrical equipment of small size.
At present, three kinds of interposers are mainly used in these BGA and CSP: a wiring tape made of polyimide or the like, a printed circuit board of a printed wiring board type made of glass epoxy or the like, and a ceramic substrate. The interposers serve to electrically and mechanically connect a semiconductor chip with a substrate on which the chip is to be mounted.
A flip chip technique is an ideal technique for mounting semiconductor chips onto an interposer at a high density. FIG. 1(a) is a cross section of a conventional flip chip BGA using the flip chip technique. The flip chip technique employs semiconductor device 1 having bumps (projecting electrodes) 13 formed on electrodes 12 of semiconductor chip 11. Bumps 13 are made of Au, Cu, Pbxe2x80x94Sn or the like, and formed with photolithography and plating. Semiconductor device 1 is bonded face down to interposer 14. At that point, bumps 13 are electrically connected through metal junction to bonding pads 16 formed at respective portions of copper wiring 15 on the surface of interposer 14. According to the flip chip technique, an increased number of pins, a reduced area for mounting, a higher speed of signal processing can be realized in semiconductor chips.
In such flip chip mounting, however, a difference in thermal expansion between semiconductor chip 11 and interposer 14 may concentrate stress on the junctions between semiconductor device 1 and interposer 14 to cause faulty connections when semiconductor device 1 is mounted on interposer 14. For this reason, sufficient reliability is difficult to ensure. It is thus essential that efforts are made to ensure reliability of mounting and a defective item after mounting can be replaced individually.
To ensure such mounting reliability, an underfill technique has been developed for filling a protection resin between semiconductor chip 11 and interposer 14. FIG. 1(b) is a cross section of a conventional flip chip BGA using the flip chip technique and the underfill technique. The underfill technique is realized such that after semiconductor device 1 is mounted on interposer 14, underfill resin 17 such as an epoxy resin is filled between semiconductor chip 11 and interposer 14 to protect the surface of semiconductor chip 11 and to reinforce the surroundings of bumps 13, thereby achieving higher reliability of connection.
The underfill technique, however, involves a problem in that a smaller pitch of electrodes 12 (fine pitch), an accompanying smaller size of bumps 13, and a smaller gap between semiconductor chip 11 and interposer 14 result in difficulties in completely filling underfill resin 17 between semiconductor chip 11 and interposer 14 and in checking whether or not any unfilled portion (void) is present after mounting.
A method capable of solving such a problem is disclosed, for example, in Japanese Patent Laid-open Publication No. 5-3183. In the method disclosed in Japanese Patent Laid-open Publication No. 5-3183, as shown in FIG. 2, bumps 13 are first provided on electrodes 12 of many semiconductor chips 11 which are allocated to semiconductor wafer 20 (FIG. 2(b)). Next, a resin is applied to the surface of semiconductor wafer 20 (semiconductor chip 11) to form protection film 18. Then, protection film 18 is cured (FIG. 2 (c)). Next, the back of semiconductor wafer 20 (semiconductor chip 11) is polished to thin the chip (FIG. 2(d)). Protection film 18 is polished to expose the surfaces of bumps 13, thereby completing semiconductor device 2.
When semiconductor device 2 is mounted on an interposer, bumps are provided also on the interposer for bonding to bumps 13.
In this method, the surface of semiconductor chip 11 is covered and protected securely. Only good items can be mounted on an interposer by performing electrical selection, and the method is suitable for providing a smaller thickness since the polishing of semiconductor wafer 20 (semiconductor chip 11) after the formation of protection resin 18 can produce a thin chip of up to approximately 50 xcexcm. In addition, even when any defect occurs after the mounting on an interposer, replacement is readily made individually since the device is not completely fixed to the interposer by an epoxy resin or the like.
On the other hand, Japanese Patent Laid-open Publication No. 11-26642 discloses a method in which semiconductor device 70 having bumps 80, adhesive sheet 98 having through-holes 102, and interposer 72B having connection holes 96 are manufactured individually before they are assembled. According to the method, after bumps 80 are aligned with connection holes 96, adhesive sheet 98 is interposed between semiconductor device body 70 and interposer 72B such that through-holes 102 are interposed between opposing bumps 80 and connection holes 96. Semiconductor device 70 is pressed against interposer 72B, bumps 80 are passed through through-holes 102 and connected to connection holes 96, and they are bonded and fixed to each other (see FIG. 3).
In addition, Japanese Patent Laid-open Publication No. 11-26642 discloses a method in which an anisotropic conductive film is used instead of adhesive sheet 98.
Japanese Patent Laid-open Publication No. 8-102474 discloses a method in which after an adhesive is applied to a main surface of a semiconductor chip on which electrodes are formed, part of the adhesive on the electrodes is removed to form holes in the adhesive layer through which the electrodes are exposed, and then bumps are filled into the holes. According to the method, the adhesive layer is formed of a photosensitive resin such as polyimide or epoxy on the entire one surface of the semiconductor wafer, and the holes are formed through chemical etching in the portions of the adhesive layer where the electrode pads are to be exposed. Then, metal such as Au is filled into the holes through plating or the like.
The aforementioned prior arts, however, have the following problems.
In the method disclosed in Japanese Patent Laid-open Publication No. 5-3183, bumps 13 and semiconductor chip 11 fixed by protection film 18 provide reliability in the junction surface of semiconductor chip 11 and bumps 13 at the time of mounting on a substrate. In mounting on various interposers, however, sufficient reliability cannot be ensured for bonding to such interposers. Also, thinner semiconductor chip 11 may cause thermal stress and warp stress applied to semiconductor chip 11 from the junction to destroy semiconductor chip 11 itself. This is because thermal stress and mechanical stress at the time of mounting on various interposers applied only to connection terminals (bumps) result in high dependence on the arrangement of the terminals, the number of pins, the size of a chip (package), the thickness of the chip and the like.
To ensure reliability of the bonding, the need of injecting an underfill resin arises. In this case, however, the mounting structure is complicated and the number of mounting steps is increased to cause a higher cost. In addition, as described above, it is difficult to inject the underfill resin between a semiconductor chip and an interposer, and especially for a number of pins of 1000 or more, voids occur frequently and an expensive substrate is readily changed to an unuseful material.
According to the method disclosed in Japanese Patent Laid-open Publication No. 11-26642, if mounting is favorably performed, adhesive sheet 98 is adhered to both semiconductor device 70 and interpose 72B and reinforces the surroundings of bumps 80, thereby making it possible to ensure reliability of bonding.
It is difficult, however, to control the position of adhesive sheet 98 such that through-holes 102 are accurately placed between opposing bumps 80 and connection holes 96. Since such accurate arrangement is more difficult especially as a semiconductor device is miniaturized with a finer pitch of electrodes and smaller bumps, miniaturization of semiconductor devices is obstructed. Additionally, since a member for reinforcing the surroundings of bumps 80 from before mounting is desired but not present, a load is applied on bumps 80 at the pressing to readily cause faulty connection. While the positioning of the sheet is not required when an anisotropic conductive film is used, a load applied on the bumps at the pressing also tends to cause faulty connection. Furthermore, in general, an anisotropic conductive film is not so inexpensive.
Thus, according to the method disclosed in Japanese Patent Laid-open Publication No. 11-26642, it is difficult to reliably mount at low cost a semiconductor device with electrodes of high density, for example having 1000-pin electrodes formed in an area of 10 mmxc3x9710 mm.
In the method disclosed in Japanese Patent Laid-open Publication No. 8-102474, after the holes are formed in the adhesive layer on the main surface of the semiconductor chip on which the electrodes are formed, the bumps are filled into the holes. Thus, a stud bump method, which is an application of a wire bonding technique cannot be used. The inability to use the wire bonding technique presents a problem of failing to have the capability of dealing with individual cases and making it difficult to perform flexible manufacturing.
On the other hand, polyimide, BT resin, ceramic and the like as a base material of an interposer are expensive to raise concern about a high proportion of its cost to the product price. Thus, inexpensive alternative means or method is desired.
A conventional BGA type semiconductor package of a flip chip method employs a build-up BT substrate as an interposer to support a significantly small pad pitch of 200 xcexcm of a semiconductor chip. The build-up BT substrate, however, is expensive to raise concern about a high proportion of its cost to the product price. Thus, inexpensive alternative means or method is desired.
The present invention has been made in view of the aforementioned prior art problems, and it is an object thereof to enable reliably mounting of a high-density type semiconductor device having a small pitch equal to a bare chip on an interposer or a mounting substrate (hereinafter referred to as xe2x80x9cinterposerxe2x80x9d)) with flip chip bonding for forming and connecting metal bumps between electrodes (bonding pads) of a semiconductor chip and leads, and to provide a semiconductor device at low cost by providing a simpler mounting structure, easier mounting, a reduced number of mounting steps, and improved yields.
It is another object of the present invention to facilitate replacement after mounting.
It is a further object of the present invention to provide a semiconductor device at low cost by some ideas for an interposer manufacturing method to reduce the number of steps and material cost.
It is another object of the present invention to reliably provide at low cost a multi chip module assembled by using a plurality of high-density type semiconductor device equal to a bare chip.
To achieve the aforementioned objects, according to a first aspect of the present invention, there is provided a semiconductor device comprising a semiconductor chip, a stud bump provided on an electrode of the semiconductor chip, and an adhesive layer provided on the surface of the semiconductor chip on which the electrode is formed, wherein the stud bump projects from a surface of the adhesive layer.
According to the semiconductor device of the first aspect of the present invention, since the stud bump is selected, the wire bonding technique can be applied. Thus, the semiconductor device has the advantage of the capability of dealing with individual cases to readily allow flexible manufacture.
The stud bump can be thermocompression-bonded to a lead on an interposer or the like as it is (without providing a bump on the lead) since the bump projects from the surface of the adhesive layer. Also, the adhesive layer reinforces the stud bump from the surroundings and no load is applied on the stud bump at the time of mounting. In addition, when the semiconductor device is mounted on an interposer or the like, the adhesive layer provides complete sealing between the semiconductor chip and the interposer.
Therefore, the semiconductor chip of the first aspect has advantages of ensuring sufficient reliability without using an underfill, allowing easy mounting of a high-density type semiconductor device having a small pitch equal to a bare chip on an interposer or the like with a simple structure and simple steps, providing improved yields, and enabling manufacture at low cost.
According to a second aspect of the present invention, there is provided a semiconductor device obtained by bonding the semiconductor device according to the first aspect of the present invention to an interposer through thermocompression bonding.
Thus, the semiconductor device according to the second aspect of the present invention has advantages of high reliability and low cost as described above due to the use of the semiconductor device of the first aspect of the present invention. When two or more semiconductor devices are bonded, an MCM of high-density packaging can be obtained.
According to a third aspect of the present invention, there is provided a semiconductor device comprising a semiconductor chip, a protection resin layer provided on the surface of the semiconductor chip on which an electrode is formed, a bump provided on the electrode of the semiconductor chip and exposed at a surface of the protection resin layer, and an interposer adhered to the surface of the protection resin layer through a cured flux and electrically connected to the bump.
Thus, the semiconductor device according to the third aspect of the present invention has the advantage of fixing the semiconductor chip securely to the interposer to ensure high reliability of bonding since the cured flux is provided between the protection resin layer and the interposer such that the flux is bonded to both of them. A thermosetting flux used for connection of the bump to the interposer adds no steps or need of an underfill.
According to a fourth aspect of the present invention, there is provided a semiconductor device obtained by providing a device hole in the interposer in the semiconductor device of the second or third aspect of the present invention.
The device hole refers to a hole provided in the surface of the interposer on which the semiconductor chip is mounted, except the area on which pad electrodes are mounted.
Thus, the semiconductor device according to the fourth aspect of the present invention has the advantage of being capable of preventing damage to the interface between the interposer and the adhesive layer due to the popcorn phenomenon since the interposer is provided with the device hole, and the advantage of eliminating the need of filling or providing a protection resin such as an underfill after the mounting of the semiconductor chip on the interposer since the surface of the semiconductor chip exposed through the device hole is resin-sealed by the adhesive layer.
According to a fifth aspect of the present invention, there is provided a semiconductor device comprising a semiconductor chip, an adhesive layer provided on the surface of the semiconductor chip on which an electrode is formed, a bump provided on the electrode of the semiconductor chip and exposed at a surface of the adhesive layer, a wiring pattern adhered to the surface of the adhesive layer and partially bonded to the bump, and an insulating and covering layer for insulating and covering the wiring pattern and selectively opening to form an external connecting portion.
In the semiconductor device according to the fifth aspect of the present invention, since only the wiring pattern and the insulating and covering layer correspond to an interposer, an expensive material such as polyimide, BT resin, or ceramic used as a base material of the interposer is not used and it is possible to provide the function of the interposer, i.e. the function of being interposed between the semiconductor chip and the mounting substrate to provide terminals arranged with a greater pitch than that of the pad electrodes for allowing mounting on the mounting substrate. As a result, the semiconductor device has the advantage of eliminating the need of using an existing interposer to enable manufacture at low cost.
In addition, the semiconductor device has the advantage of fixing the wiring pattern with the adhesive layer to ensure high reliability of bonding.
According to a sixth aspect of the present invention, there is provided a semiconductor device comprising a semiconductor chip, a protection resin layer provided on the surface of the semiconductor chip on which an electrode is formed, a bump provided on the electrode of the semiconductor chip and exposed at a surface of the protection resin layer, a wiring pattern adhered to the surface of the protection resin layer through a cured flux and partially bonded to the bump, and an insulating and covering layer for insulating and covering the wiring pattern and selectively opening to form an external connecting portion.
In the semiconductor device according to the sixth aspect of the present invention, since only the wiring pattern and the insulating and covering layer correspond to an interposer, an expensive material such as polyimide, BT resin, or ceramic used as a base material of the interposer is not used and it is possible to provide the function of the interposer, i.e. the function of being interposed between the semiconductor chip and the mounting substrate to provide terminals arranged with a greater pitch than that of the pad electrodes for allowing mounting on the mounting substrate. As a result, the semiconductor device has the advantage of eliminating the need of using an existing interposer to enable manufacture at low cost.
In addition, the semiconductor device has the advantage of fixing the wiring pattern with the cured flux to ensure high reliability of bonding. A thermosetting flux used for connection of the bump to the wiring pattern adds no steps or need of an underfill.
According to a seventh aspect of the present invention, there is provided a semiconductor apparatus (multi chip module) comprising, two or more semiconductor devices, each of the devices including a semiconductor chip, an adhesive layer provided on the surface of the semiconductor chip on which an electrode is formed, and a bump provided on the electrode of the semiconductor chip and exposed at a surface of the adhesive layer, wherein part of the surface of one of the semiconductor devices on which the adhesive layer is provided is bonded to part or all of the surface of another one of the semiconductor devices on which the adhesive layer is provided and they are electrically connected to each other with the bumps at the bonding surface.
The semiconductor apparatus according to the seventh aspect of the present invention is a multi chip module obtained by bonding the semiconductor chips such that the surfaces thereof on which the electrodes are formed are bonded to each other, and has advantages of high packaging density and ensuring high reliability of bonding with the adhesive layer. It is possible that an interposer or the like is adhered to the surface of the semiconductor device on which the adhesive layer is formed except the bonding surface of the semiconductor chips to bond the bump to a lead of the interposer in that area for mounting.
According to an eighth aspect of the present invention, there is provided a semiconductor apparatus (multi chip module) comprising, two or more stacked semiconductor devices, each of the devices including a semiconductor chip having electrodes formed on the front and back, an adhesive layer provided on the front or back of the semiconductor chip, and a bump provided on the electrode of the semiconductor chip and exposed at a surface of the adhesive layer, wherein upper one of the semiconductor devices is bonded to lower one of the semiconductor devices with the adhesive layer and the electrodes thereof are connected to each other through the bump.
The semiconductor apparatus according to the eighth aspect of the present invention is a multi chip module obtained by bonding and stacking a plurality of the semiconductor chips and establishing electrical conduction through the bumps, and has advantages of high packaging density and ensuring high reliability of bonding with the adhesive layer.
According to a ninth aspect of the present invention, there is provided a semiconductor device including a thermoplastic resin with adhesion as the adhesive layer in the semiconductor device according to the first, second, fifth, seventh, or eighth aspect of the present invention.
Thus, the semiconductor device according to the ninth aspect of the present invention has the advantage of allowing individual replacement of a defective semiconductor chip after bonding since the adhesive layer is formed of the thermoplastic resin with adhesion and the semiconductor chip can be separated from the base material by heat applied to the adhesive layer. Particularly, since a defective item can be replaced even after a number of semiconductor chips are mounted on a single wiring substrate, the wiring substrate is not wasted.
According to a tenth aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of:
forming a predetermined number of semiconductor chips on a semiconductor wafer and providing a bump on an electrode of each of the semiconductor chips;
forming an adhesive layer on the surface on which the bump is provided;
etching an entire surface of the adhesive layer until the bump projects; and
cutting the semiconductor wafer for division into each of the semiconductor chips.
Thus, the method of manufacturing a semiconductor chip according to the tenth aspect of the present invention allows manufacture of a semiconductor device with a simple process which can readily realize reliable mounting to provide adhesion and electrical connection to the interposer or the like and to seal the junction.
Since the adhesive layer is formed after the provision of the bump, it is not necessary to bore a hole in the adhesive layer and perform some processing. It is thus not necessary to form the adhesive layer through a number of processes such as mask design with a lithography technique, resist application, exposure, development, and etching. Required processing is providing the adhesive layer and etching after the provision of the bump by using the wire bonding technique.
According to an eleventh aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of:
forming a predetermined number of semiconductor chips on a semiconductor wafer and providing a bump on an electrode of each of the semiconductor chips;
forming an adhesive layer on the surface on which the bump is provided;
etching an entire surface of the adhesive layer until the bump projects;
cutting the semiconductor wafer for division into each of the semiconductor chips; and
mounting one, or two or more of the semiconductor chips on a single wiring substrate, and performing heating and pressing for adhesion to the wiring substrate with the adhesive layer and electrical connection to wiring on the wiring substrate with the bump.
Thus, the method of manufacturing a semiconductor device according to the eleventh aspect of the present invention provides advantages similar to those from the tenth aspect of the present invention and advantages of a significant reduction in the number of steps for manufacturing a semiconductor package and a significant reduction in the time required for the steps since the adhesion and electrical connection to an interposer are simultaneously performed to simultaneously achieve inner lead bonding of all electrodes on the semiconductor chip, and adhesion of the semiconductor chip to the wiring substrate and sealing of the junction surface.
For example, when 30 semiconductor devices each with 1000-pin electrodes on a wiring substrate are mounted, a conventional signal point bonding method takes a total of 3000 seconds assuming that bonding takes 0.1 second per electrode. According to the eleventh aspect of the present invention, however, bonding is completed in approximately 10 to 20 seconds, and adhesion is also completed at the same time, thereby achieving great advantages in terms of time and economics.
In addition, the adhesive layer can provide high reliability of bonding to eliminate the need of using an underfill.
It should be noted that the wiring substrate corresponds to a wiring tape, a plastic substrate, a ceramic substrate, a lead frame or the like.
According to a twelfth aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of:
forming a predetermined number of semiconductor chips on a semiconductor wafer and providing a bump on an electrode of each of the semiconductor chips;
forming a protection resin layer on the surface on which the bump is provided;
etching an entire surface of the protection resin layer until the bump projects;
cutting the semiconductor wafer for division into each of the semiconductor chips;
for one, or two or more of the semiconductor chips, applying a thermosetting flux to the bump and the protection resin layer or to a wiring substrate corresponding thereto;
disposing the bump on wiring of the wiring substrate; and
performing heating to solder the bump to the wiring and cure the thermosetting flux.
The method of manufacturing a semiconductor device according to the twelfth aspect of the present invention provides advantages of a significant reduction in the number of steps for manufacturing a semiconductor package and a significant reduction in the time required for the steps similarly to the eleventh aspect of the present invention since the bump is bonded to the wiring on the wiring substrate with reflow and the cured flux interposed between the protection resin layer and the wiring substrate bonds the semiconductor chip to the wiring substrate to simultaneously achieve the adhesion and electrical connection to an interposer.
In addition, the cured flux can provide high reliability of bonding to eliminate the need of using an underfill.
According to a thirteenth aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of:
forming a predetermined number of semiconductor chips on a semiconductor wafer and providing a bump on an electrode of each of the semiconductor chips;
forming an adhesive layer on the surface on which the bump is provided;
etching an entire surface of the adhesive layer until the bump projects; and
bonding the semiconductor wafer to a wiring substrate through the adhesive layer and cutting the semiconductor chip along its perimeter for division into each of the semiconductor chips.
The method of manufacturing a semiconductor device according to the thirteenth aspect of the present invention has the advantage of reducing two dicing steps for the semiconductor wafer and for the wiring substrate to one since the semiconductor chip is cut with the wiring substrate bonded thereto.
The method of manufacturing a semiconductor device according to the thirteenth aspect of the present invention allows simple manufacture of a CSP in which a semiconductor chip and an interposer have the same area and are completely stacked. For manufacturing a flange type semiconductor package including an interposer with its area larger than that of a semiconductor chip, a semiconductor chip may be mounted on a wiring substrate after division into each of semiconductor chips as in the eleventh aspect of the present invention.
In addition, the adhesive layer can provide high reliability of bonding to eliminate the need of using an underfill.
According to a fourteenth aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of:
forming a predetermined number of semiconductor chips on a semiconductor wafer and providing a bump on an electrode of each of the semiconductor chips;
forming an adhesive layer on the surface on which the bump is provided;
etching an entire surface of the adhesive layer until the bump projects;
aligning the semiconductor wafer with a wiring substrate through the adhesive layer, and performing heating and pressing for adhesion to the wiring substrate with the adhesive layer and electrical connection to wiring on the wiring substrate with the bump;
cutting the semiconductor chip along its perimeter for division into each of the semiconductor chips.
The method of manufacturing a semiconductor chip according to the fourteenth aspect of the present invention provides advantages similar to those of the thirteenth aspect of the present invention and advantages of a significant reduction in the number of steps for manufacturing a semiconductor package and a significant reduction in the time required for the steps since the adhesion and electrical connection to an interposer are simultaneously performed to simultaneously achieve inner lead bonding of all electrodes on the semiconductor chip, and adhesion of the semiconductor chip to the wiring substrate and sealing of the junction surface. The adhesive layer can provide high reliability of bonding to eliminate the need of using an underfill.
According to a fifteenth aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of:
forming a predetermined number of semiconductor chips on a semiconductor wafer and providing a bump on an electrode of each of the semiconductor chips;
forming a protection resin layer on the surface on which the bump is provided;
etching an entire surface of the protection resin layer until the bump projects;
applying a thermosetting flux to the bump and the protection resin layer or to a wiring substrate corresponding thereto;
disposing the bump on wiring of the wiring substrate;
performing heating to solder the bump to the wiring and cure the thermosetting flux; and
cutting the semiconductor chip along its perimeter for division into each of the semiconductor chips.
The method of manufacturing a semiconductor device according to the fifteenth aspect of the present invention provides advantages similar to those of the thirteenth aspect of the present invention and advantages of a significant reduction in the number of steps for manufacturing a semiconductor package and a significant reduction in the time required for the steps similarly to the eleventh aspect of the present invention since the bump is bonded to the wiring on the wiring substrate with reflow and the cured flux interposed between the protection resin layer and the wiring substrate bonds the semiconductor chip to the wiring substrate to simultaneously achieve the adhesion and electrical connection to an interposer.
The cured flux can provide high reliability of bonding to eliminate the need of using an underfill.
According to a sixteenth aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of:
providing a bump on an electrode of a semiconductor chip;
forming an adhesive layer on the surface on which the bump is provided;
etching an entire surface of the adhesive layer until the bump project;
bonding the semiconductor chip to a metal foil through the adhesive layer; and
forming the metal foil into a wiring pattern.
The method of manufacturing a semiconductor device according to the sixteenth aspect of the present invention provides the advantage of reduced cost since the wiring pattern for connecting the semiconductor chip to a mounting substrate is formed by using the semiconductor chip as a base to eliminate the need of using an additional interposer and thus the need of the material and process thereof, and the advantage of providing a thinner semiconductor package. The adhesive layer can provide high reliability of bonding to eliminate the need of using an underfill.
According to a seventeenth aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of:
providing a bump on an electrode of a semiconductor chip;
forming an adhesive layer on the surface on which the bump is provided;
etching an entire surface of the adhesive layer until the bump projects;
aligning the semiconductor chip with a metal foil through the adhesive layer, and performing heating and pressing for adhesion to the metal foil with the adhesive layer and electrical connection to the metal foil with the bump; and
forming the metal foil into a wiring pattern.
The method of manufacturing a semiconductor device according to the seventeenth aspect of the present invention provides the advantages of the sixteenth aspect of the present invention and advantages of a significant reduction in the number of steps for manufacturing a semiconductor package and a significant reduction in the time required for the steps since the adhesion and electrical connection to the metal foil are simultaneously performed to simultaneously achieve inner lead bonding of all electrodes on the semiconductor chip, and adhesion of the semiconductor chip to the metal foil and sealing of the junction surface.
According to an eighteenth aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of:
providing a bump on an electrode of a semiconductor chip;
forming a protection resin layer on the surface on which the bump is provided;
etching an entire surface of the protection resin layer until the bump projects;
aligning the semiconductor chip with a metal foil through the protection resin layer;
performing heating to solder the bump to the metal foil and cure a thermosetting flux; and
forming the metal foil into a wiring pattern.
The method of manufacturing a semiconductor device according to the eighteenth aspect of the present invention provides advantages similar to those of the sixteenth aspect of the present invention and advantages of a significant reduction in the number of steps for manufacturing a semiconductor package and a significant reduction in the time required for the steps since the bump is bonded to the wiring on the wiring substrate with reflow and the cured flux interposed between the protection resin layer and the wiring substrate bonds the semiconductor chip to the wiring substrate to simultaneously achieve the adhesion and electrical connection to an interposer.
The cured flux can provide high reliability of bonding to eliminate the need of using an underfill.
According to a nineteenth aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of:
forming a predetermined number of semiconductor chips on a semiconductor wafer and providing a bump on an electrode of each of the semiconductor chips;
forming an adhesive layer on the surface on which the bump is provided;
etching an entire surface of the adhesive layer until the bump projects; and
boning the semiconductor wafer to a metal foil through the adhesive layer; and
forming the metal foil into a wiring pattern; and
then, cutting the semiconductor chip along its perimeter for division into each of the semiconductor chips.
The method of manufacturing a semiconductor device according to the nineteenth aspect of the present invention provides the advantage of reduced cost since the semiconductor chip is provided with the wiring pattern for connecting the semiconductor chip to a mounting substrate in the process on the semiconductor wafer to eliminate the need of using an additional interposer and thus the need of the material and process thereof, and the advantage of providing a thinner semiconductor package. The adhesive layer can provide high reliability of bonding to eliminate the need of using an underfill.
According to a twentieth aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of:
forming a predetermined number of semiconductor chips on a semiconductor wafer and providing a bump on an electrode of each of the semiconductor chips;
forming an adhesive layer on the surface on which the bump is provided;
etching an entire surface of the adhesive layer until the bump projects;
aligning the semiconductor wafer with a metal foil through the adhesive layer, and performing heating and pressing for adhesion to the metal foil with the adhesive layer and electrical connection to the metal foil with the bump;
forming the metal foil into a wiring pattern; and
then, cutting the semiconductor chip along its perimeter for division into each of the semiconductor chips.
The method of manufacturing a semiconductor device according to the twentieth aspect of the present invention provides the advantages of the nineteenth aspect of the present invention and advantages of a significant reduction in the number of steps for manufacturing a semiconductor package and a significant reduction in the time required for the steps since the adhesion and electrical connection to the metal foil are simultaneously performed to simultaneously achieve inner lead bonding of all electrodes on the semiconductor chip, and adhesion of the semiconductor chip to the metal foil and sealing of the junction surface.
According to a twenty-first aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of:
forming a predetermined number of semiconductor chips on a semiconductor wafer and providing a bump on an electrode of each of the semiconductor chips;
forming a protection resin layer on the surface on which the bump is provided;
etching an entire surface of the protection resin layer until the bump projects;
aligning the semiconductor wafer with a metal foil through the protection resin layer;
performing heating to solder the bump to the metal foil and cure a thermosetting flux;
forming the metal foil into a wiring pattern; and
then, cutting the semiconductor chip along its perimeter for division into each of the semiconductor chips.
The method of manufacturing a semiconductor device according to the twenty-first aspect of the present invention provides the advantages of the nineteenth aspect of the present invention and advantages of a significant reduction in the number of steps for manufacturing a semiconductor package and a significant reduction in the time required for the steps since the bump is bonded to the wiring on the wiring substrate with reflow and the cured flux interposed between the protection resin layer and the wiring substrate bonds the semiconductor chip to the wiring substrate to simultaneously achieve the adhesion and electrical connection to an interposer.
The cured flux can provide high reliability of bonding to eliminate the need of using an underfill.
According to a twenty-second aspect of the present invention, there is provided a method of manufacturing a semiconductor device of any one of the sixteenth to twenty-first aspects of the present invention, in which an insulating and covering layer is selectively formed on the wiring pattern after the metal foil is formed on the wiring pattern.
In the method of manufacturing a semiconductor device according to the twenty-second aspect of the present invention provide, the insulating and covering layer selectively formed on the wiring pattern insulates and covers the wiring pattern, and an opening in the insulating and covering layer exposes part of the wiring pattern to form an electrode (land portion) for electrical connection to the outside. The device may be used as an LGA type package.
According to a twenty-third aspect of the present invention, there is provided a method of manufacturing a semiconductor device of the twenty-second aspect of the preset invention, in which after the insulating and covering layer is selectively formed on the wiring pattern, a solder ball is provided on a land portion of the wiring pattern exposed through an opening of the insulating and covering layer.
The method of manufacturing a semiconductor device provides a BGA type package.
According to a twenty-fourth aspect of the present invention, there is provided a method of manufacturing a semiconductor device of the tenth, eleventh, thirteenth, fourteenth, sixteenth, seventeenth, nineteenth or twentieth aspect of the present invention, in which the adhesive layer is a thermoplastic resin with adhesion.
The method of manufacturing a semiconductor device according to the twenty-fourth aspect of the present invention provides the advantage of being capable of replacing a defective semiconductor chip individually after the adhesion since the adhesive layer is a thermoplastic resin with adhesion and thus the semiconductor chip can be separated from the base material by adding heat to the adhesive layer. Particularly, since a defective item can be replaced even after a number of semiconductor chips are adhered to a single wiring substrate, the method provides the advantage of preventing wasted wiring substrates.
According to a twenty-fifth aspect of the present invention, there is provided a semiconductor device comprising a semiconductor chip, an adhesive layer provided on the surface of the semiconductor chip on which an electrode is formed, a bump provided on the electrode of the semiconductor chip and exposed at a surface of the adhesive layer, a tape substrate, and an interposer, wherein the semiconductor chip is adhered to the front of the tape substrate with the adhesive layer, the semiconductor chip is electrically connected to the tape substrate with the bump, and the interposer is connected to the back of the tape substrate for allowing electrical conduction.
As described above, the present invention produces the effect of allowing low-cost manufacture of a high density package (hereinafter abbreviated as xe2x80x9cHDPxe2x80x9d)) which realizes reliable bonding by forming the bump for electrical connection and the adhesive resin having the adhesion function on the semiconductor chip.
When the HDP is mounted on another BGA substrate or the like to manufacture a package larger than the semiconductor chip, an underfill step for injecting a resin between the semiconductor chip and the substrate is not required since the adhesive layer adheres to the BGA substrate or the like to provide sealing between the semiconductor chip and the substrate. For this reason, the HDP with a smaller pitch can be mounted reliably on an interposer or the like to achieve a simpler mounting structure, easier mounting, a reduced number of steps for mounting, and improved yields. The present invention thus provides the effect of manufacturing a semiconductor package such as a CSP with reliability of mounting.
Since the bump for electrical connection and the adhesive resin having the adhesion function are formed on the semiconductor chip to realize reliable bonding, the present invention advantageously facilitates replacement after mounting to prevent expensive wiring substrates from being wasted.
In addition, the interposer is formed directly on the semiconductor wafer to reduce the number of steps for manufacturing the interposer and the material cost of the interposer. Thus, the present invention produces the effect of being capable of providing various semiconductor packages at low cost.
The present invention advantageously provides a high-density packaging multi chip module with high reliability and at low cost by using a plurality of HDPs such that they are partially bonded to each other or they are laminated and bonded to each other.
Furthermore, since the bump and the adhesive resin are formed on the semiconductor chip as a wafer, efficient manufacture can be performed.
Since the semiconductor device is previously provided with the adhesive resin, electrical connection and adhesion to a BGA substrate or the like can be simultaneously performed by thermocompression bonding or reflow processing in combination with a thermosetting flux when the semiconductor device is mounted on the BGA substrate or the like, thereby leading to favorable efficiency of manufacture.
Moreover, the present invention can readily support flexible manufacturing since the wire bonding technique is applicable to the bump formation.